Elon Musk's New Product Is the Biggest Bet in Industrial History: Why Terafab Rewrites Semiconductor Scale

Elon Musk just described the most epic chip-building exercise in history. The price tag is $25 billion. The joint venture sits under one roof across Tesla, SpaceX, and xAI. The goal sounds like science fiction until you do the math: 200 billion custom AI chips a year, one terawatt of compute annually, and about 80% of that compute flying into orbit on SpaceX satellites.

I've covered Elon's companies for over 14 years. This is one of the most ambitious plans he's ever put on a stage. And when you dig into the numbers, something doesn't add up — until you realize Terafab isn't trying to become the next TSMC. It's trying to own the loop that actually decides who wins AI hardware.

The factory that wants 70% of TSMC

Initial target: 100,000 wafer starts per month. Full scale: 1 million. TSMC — the company that builds chips for Apple, Nvidia, AMD, Qualcomm, basically everyone — runs about 1.4 million wafer starts per month across every fab it owns on Earth. Elon wants one factory doing roughly 70% of that alone.

Under that roof: design, lithography, fabrication, memory, advanced packaging, testing, and mask making. Two chip families matter right away. Inference chips for Tesla vehicles and Optimus robots. And the D3 chip for orbital AI satellites SpaceX launches. Today's fabs on Earth produce maybe 2% of what Elon's companies say they need across all those projects. So Terafab isn't a nice-to-have. It's the only path that matches the demand curve he's drawing.

The bottleneck in a town of 45,000

Every leading-edge 2-nanometer chip depends on a machine built by one company in one small city in the Netherlands. ASML. Headquarters: Veldhoven. Population: about 45,000. From that town, ASML controls the single hardest choke point in the technology industry.

The machine is an EUV lithography system — extreme ultraviolet. It took about 25 years and more than 10 billion euros to develop. It weighs 180 tons. It holds more than 100,000 components from 5,100 suppliers across 15 countries. Each unit costs on the order of $200 million to $400 million. Shipping one means about 20 trucks and three cargo planes. Installation takes months. Calibration takes more months.

Here's what it does. A high-powered laser hits molten tin droplets 50,000 times per second. Each droplet becomes plasma hotter than the surface of the sun. That plasma emits 13.5-nanometer light — 30 to 50 times shorter than visible light. Air absorbs it. Glass absorbs it. Water absorbs it. So the whole optical path runs on mirrors inside an ultra-high vacuum. Those mirrors come from Zeiss in Germany, polished to picometer flatness. Scale one to the size of Germany and the tallest bump would be less than a millimeter. Each mirror takes 18 to 24 months to make. You can't rush physics.

ASML shipped 44 EUV machines in 2024, 48 in 2025, and is forecasting around 60 in 2026, maybe close to 70 in 2027 including next-gen high-NA systems. Call it 50 to 60 a year, trending up slowly. Every one of them is already allocated to TSMC, Samsung, and Intel for years. There is no spare capacity and no second source.

The math that breaks the headline

At 2 nanometers, a chip needs roughly 15 to 25 EUV layers. Each tool can process about 45,000 wafer starts per month per layer. For Terafab's opening target of 100,000 wafer starts per month, you need something like 30 to 75 EUV machines just to start. At 1 million wafer starts, you need 300 to 500.

There are about 400 EUV machines installed on the entire planet. Full-scale Terafab would want more than exist. At roughly $300 million apiece, the first phase alone is $9 to $22 billion in EUV tools. Full scale blows past $100 billion — four to seven times the announced factory budget — for one class of equipment. Lead times run 18 to 36 months. ASML's next two years of production are spoken for. A handful of machines by 2028 if you're lucky. Maybe 10 by 2029. A hundred thousand wafer starts by 2030 is a stretch. A million this decade is fantasy if Terafab has to buy every layer on virgin EUV capacity.

If the story ends there, the project is physically impossible under today's supply chain. Semiconductor analysts looking at those numbers are saying exactly that.

What Terafab actually is

A lot of people frame this as a head-on rival to TSMC. That's the wrong frame. Near-term, Terafab looks more like a design-iteration factory and an advanced packaging factory that grows into volume later. The long-term wafer targets are real. The immediate edge is different: speed of revision and how you assemble the silicon you already have.

Today's chip cycle is brutal. Engineers finish a design. They send it to Taiwan. Mask making takes two to four weeks. A full advanced-node wafer run takes two to three months across 50 to 100-plus layers. Test chips come back. Bugs show up. Redesign. Another three to four months. A complex chip can need five to 15 iterations. You're looking at a year or more — often two to three — before mass production.

Now put the mask shop and targeted lithography under the same roof as the designers. Walk the revision down the hall. Make the mask on site. Run the specific layers you're testing in days to a couple of weeks. Cycle time collapses from months to one or two weeks. Conservatively, that's five to ten times faster than the classic foundry loop. For prototyping, you don't need 500 EUV tools. You might need two to five — or even get by on older lithography while the mask shop kills the biggest delay.

Chiplets beat the EUV shortage

The second move is packaging. The old model crams everything onto one giant die. At 2 nanometers, a big monolithic GPU-class chip can see 30% to 40% yield. The rest goes in the trash. The industry already moved toward chiplets: small dies with specific jobs, snapped together like high-end LEGO.

Compute cores can stay on 2-nanometer EUV. Memory can sit on 5-nanometer. Input/output can live on 7-nanometer. Those older nodes use deep-ultraviolet tools that are cheaper and far more available. Yields on smaller dies jump toward 80%. Advanced packaging then ties them together with thousands of microscopic high-bandwidth links so they behave like one piece of silicon — with better yield and more flexibility.

That is how Terafab sidesteps the ASML wall. Only a fraction of the silicon — maybe a quarter or less — needs scarce EUV capacity. The rest runs on equipment you can actually buy. Short term, Tesla can still lean on Samsung in Texas and other foundries for the hardest compute chiplets while Terafab owns packaging, the mask shop, the iteration loop, and system integration. AMD already proved the chiplet bet. Nvidia rides the same packaging wave. Packaging can matter more than who owns every lithography bay.

Why custom silicon compounds

Nvidia's GPUs are a restaurant kitchen that can cook anything. When Tesla runs inference for Full Self-Driving or Optimus, a chunk of that kitchen sits idle — video decoders, graphics paths, features the model never touches. Those transistors still burn watts and make heat.

Rapid in-house cycles let Tesla strip that waste. Shorten the cache paths the model actually uses. Delete logic no Tesla workload needs. Put more of what inference wants on the die. Same transistor count, far higher useful work. That's the Apple playbook: marry hardware to software so hard that efficiency jumps even when both companies use the same foundry.

For Optimus, watts are runtime. A much more efficient chip means longer work per charge on the same battery. Milliseconds of latency matter when a robot reaches for something dangerous. Higher throughput per chip means fewer chips per robot and a path toward that $2-per-hour robotic labor number that rewrites factory economics. Year one you might be 40% more efficient than a general-purpose GPU on Tesla's workloads. Year two, after a hundred-plus iterations while rivals wait on their next foundry spin, the gap widens. Year three the chip and the model co-evolve. Competitors buying Nvidia off the shelf can't remodel the kitchen every week. Building a $25 billion mask-to-package stack from scratch takes years. By the time they arrive, Tesla is hundreds of design iterations ahead. That head start compounds. That's a real moat.

Taiwan, China, and the Dutch city that still decides

There's also the map. A giant share of advanced chip capacity sits in Taiwan. If China takes Taiwan, the West's access to that capacity does not stay the same. China has its own EUV push — Huawei and a national effort with thousands of engineers. They had a working prototype generating about 100 watts of EUV power in early 2025. Production machines need 600 watts or more. Chinese executives themselves have admitted domestic alternatives still look like ASML circa 2008. Realistic volume for Chinese EUV is more like 2030 to 2035.

So you have two of the most ambitious tech programs on Earth right now: China's national semiconductor push, and Elon's $25 billion Terafab. Both trace back to the same company in a Dutch city of 45,000 people. One is trying to copy ASML. The other may have figured out it doesn't need as many machines as everyone assumes — if it's ruthless about iteration and packaging.

It happened with rockets. It happened with cars. It happened with brain interfaces. The open question is whether chips break the same way.

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